In recent years, a stacked semiconductor memory device has been proposed in which memory cells are integrated three-dimensionally. In such a stacked semiconductor memory device, a stacked body in which electrode films and insulating films are stacked alternately is provided on a semiconductor substrate; and semiconductor pillars that pierce the stacked body are provided. Memory cell transistors are formed at each crossing portion between the electrode films and the semiconductor pillars. In such a stacked semiconductor memory device, it is desired to shorten the spacing between the electrode films as much as possible to realize even higher integration.